Runcards of CMOS-161 process

Outline of the process

TEST RESULTS

Step 0. Starting wafers

Step 1. Initial oxidation

Step 2. Zero layer photo

Step 3. Pad oxidation/Nitride deposition

Step 4. N-Well photo

Step 5. Nitride etch

Step 6. N-Well implant

Step 7. Nitride removal

Step 8. Pad oxidation/Nitride deposition

Step 9. P-Well photo

Step 10. Nitride etch

Step 11. P-Well implant

Step 12. Nitride removal

Step 13. Well drive in

Step 14. Pad oxidation/Nitride deposition

Step 15. Active area photo

Step 16. Nitride etch

Step 17. P-Well field implant photo

Step 18. P-Well field ion implant

Step 19. LOCOS oxidation

Step 20. Nitride removal, pad oxide removal

Step 21. Sacrificial oxidation

Step 22. Screen oxidation

Step 23. NMOS Vt adjustment implant photo
Step 24. NMOS Vt adjustment implant
Step 25. PMOS Vt adjustment implant photo
Step 26. PMOS Vt adjustment implant
Step 27. Gate oxidation, Poly Si deposition
Step 28. Gate photo
Step 29. Poly Si etch
Step 30. P-type LDD implant photo
Step 31. P-type LDD implant
Step 32. N-type LDD implant photo

Step 33. N-type LDD implant
Step 34. LDD spacer deposition
Step 35. LDD spacer etch
Step 36. P+ Gate and S/D photo
Step 37. P+ Gate and S/D implant
Step 38. N+ Gate and S/D photo
Step 39. N+ Gate and S/D implant
Step 40. Backside etch
Step 41. Gate & S/D annealing
Step 42. Silicidation
Step 43. PSG deposition and densification
Step 44. Contact photo
Step 45. Contact etch
Step 46. Metal 1 deposition
Step 47. Metal 1 photo
Step 48. Metal 1 Aluminum etch
Step 49. Sintering

Step 50. Test results after Metal1

Continue the process with second metal layer:

Step 51. Dielectric deposition and planarization

Step 52. Via litho

Step 53. Via etch

Step 54. Metal 2 deposition

Step 55. Metal 2 litho

Step 56. Metal 2 etch

Step 57. Ring oscillator testing after Metal2