Process Manuals
1.  General Information
1.1   Archived Process Manuals
1.2   How to Write a Process Manual
1.3   Blue & Gold Show Wafer Process
1.4   How to give a Nanolab orientation tour
1.5   Baseline CMOS Process
1.6   Processing of Glass Substrates
1.7   Stocked Tweezers
1.8   Stocked Beakers
1.9   Stocked Wafers
1.10   Administrative Quick Reference Guide
1.11   Tips and Tricks when Working with Small Samples
1.12   Chemical/Labware Guidelines
1.13   NanoLab Supplemental Process Data
2.  Sink Processes
2.1   Handle Wafer Bonding
2.2   Heated Water Bath Preparation
2.3   Silicon Nitride Membrane Fabrication
2.4   Photoresist Stripping of Wafers
2.5   General Labware Cleaning Procedures
2.6   Pocket Wafer Fabrication
2.7   Sol-gel PZT
2.9   VLSI Etchants
2.10   Miscellaneous Etchants
2.11  (msink19) Legacy Plating Solutions (From the archives)
3.  Mask Making
3.1   Mask Request Quick Steps
3.2  (asml300) ASML Reticle Design Guide
3.3  (gcaws6) GCAWS6 Reticle Design Guide
3.4   Iron Oxide Mask Processing
4.  Photolithography
4.10   Summary of Nanolab Photoresists
4.11   Recipe Names for Standard Lithography Processes
4.12   Process Tables for Nanolab Photoresists
4.13   Meander Generator
4.14  (asml300) ASML FEM Generator
4.15  (mla150) MLA150 FEM Generator
4.20   MiR 701 Photoresist Process
4.21   MiR 900 Photoresist Process
4.22   AZ 12xT Photoresist Process
4.23   AZ P4620 Photoresist Process (Legacy)
4.24   UV 26 Photoresist Process
4.25   UV 210 Photoresist Process
4.26   OCG 934 3:2 Developer Verification
4.27   SU8 Photoresist Process
4.30  (asml300) How to Run a Focus Exposure Matrix on the ASML 5500/300
4.31  (asml300) Demonstration of 150 nm Feature Resolution on ASML
4.32  (asml300) Running 4" Wafers on MESCs in ASML
4.40  (ksaligner) Chip Lithography on ksaligner
4.50   Mix & Match Process
4.60  (asap-liftoff) ASAP Process Acceptance Summary
4.61   Lift-Off Processing Guide
4.62   Image Reversal Processing Guide
4.70  (crestec130kv) PMMA Process Manual
4.71  (crestec130kv) CSAR Developer
5.  Thermal Processing
5.1   Working with Temperature Control with the RTP's
5.2  (tystar15) aSi LPCVD comparison Tystar10 and Tystar15
5.3  (tystar6) Tystar 6 N-Doping Characterization Summary
5.4  (tystar7) Tystar 7 P-Doping Characterization Summary
5.5   Low Stress Silicon Carbide Process
6.  Thin Film Systems
6.1   Changing a Crystal Monitor
6.2   PECVD Overview from Oxford Instruments
6.3  (oxfordpecvd4) PECVD SiOx Deposition with 81MHz Power
6.4  (oxfordpecvd4) PECVD SixNy Deposition with 81MHz Power
6.5  (evapclass) NanoLab Precious Metal Melt and Target Policies
6.6   ITO Prepared by Reactive Thermal Evaporation
7.  Etching Systems
8.  Testing and Inspection
8.1   Line and Surface Roughness Measurements with the Olympus
8.2  (ellips2) Spectroscopic Ellipsometer Model Analysis
8.3  (ftir) Introduction to FT/IR Measurements
8.4   LED Microscope Illumination Project
9.  Packaging
9.1   Cleaving a Silicon Wafer
10.  Planarization

07/31/25