Run Card for FlexFET process

Step 54. STI oxide etch

Steps

Notes

Date

Operator

54.1

Centura MXP_OXSP_ETCH recipe

Split:

- w # 2, 5, 6, 10, 14 will receive additional etch (channel Si etch) using MXP_NITRSP_ETCH recipe after STI oxide etch is done

Etch times:

Wafer	MXP_OXSP_ETCH	MXP_NITRSP_ETCH
# 2	135sec	10sec
# 3	135sec + 15sec	-
# 5	135sec + 8sec	10sec
# 6	135sec + 10sec	10sec
# 7	140sec + 5sec	-
# 9	145sec + 8sec	-
# 10	130sec + 11sec	10sec
# 12	135sec + 15sec	-
# 13	135sec + 20sec+5sec	-
#14	135sec + 15sec	10sec

Note: Second etch times were calculated after measuring the remaining STI oxide thickness on each wafer.

7/14/04

Horvath

54.2

Final remaining BOX thickness (measurement pad area over BOX, open for M0 etch):

Wafer	T	C	F	L	R
# 2	615	1058	869	997	920
# 3	640	670	680	650	640
# 5	501	1020	630	1012	612
# 6	468	798(?)	1110	1041	894
# 7	455	1331	652	1052	854
# 9	711	1213(?)	799	1152	795
# 10	544	1118	697	1036	748
# 12	893	1234	1105	1212	975
# 13	518	1137	734	1041	761
#14	577	1151	721	1034	699

Bottom gate Si thickness on BOX (measurement pad area over BOX + bottom gate, open for M0 etch):

Wafer	T	C	F	L	R
# 5	714	851	805	818	787
# 10	1241	1360	1270	1306	1281

STI oxide trench over bottom gate Si area (profilometer data):

Wafer	T	C
# 5	6340	6640
# 10	6440	6890
# 13	7530	8000

STI oxide trench over BOX area (profilometer data):

Wafer	T	C
# 5	7820	7820
# 10	8150	8090
# 13	8430	8800

07/15/04

Horvath