Run Card for FlexFET process

 

 

Step 39. Bottom gate photo           

 

 

 

Steps

Notes

Date

Operator

 

39.1

 

 

Clean wafers:

-          Implanted wafers: 5 min piranha + rinse

-          Silicided wafers: rinse only

 

05/27/04

Horvath

 

39.2

 

 

Standard DUV litho with BARC:

 

ASML:

-          FlexFET1 reticle, mask BOTGATE

-          Energy-focus matrix to determine best exposure settings

-          Expose all the wafers with 22mJ (0.35um open)

 

Hard bake: Oven bake at 120C for 1hr

 

 

05/27/04

Horvath