Run Card for FlexFET process

 

 

Step 33. NMOS photo

 

 

 

Steps

Notes

Date

Operator

 

33.1

 

 

Standard DUV litho with NO BARC (because of the following wet etch step):

 

ASML:

-          FlexFET2 reticle, mask N-SELECT

-          80mJ for CMOS silicided S/D wafers (F#5, 6, 9, 10)*

-          140mJ for CMOS implanted S/D wafer F#3

-          120mJ for CMOS implanted S/D wafer F#7 (still a little over exposed)

 

Hard bake: Oven bake at 120C for 1hr

 

Device Si thickness could be measured on the open areas of the wafers, ensuring the removal of the photoresist from the NMOS windows.

 

*: Machine constant had to be modified to accept the alignment of F#10.

 

05/07, 10/04

Horvath