Step 25. PMOS photo
|
Steps |
Notes |
Date |
Operator |
|
25.1 |
Standard DUV litho with NO
BARC (because of the following wet etch step): ASML: -
FlexFET2 reticle, mask P-SELECT -
80mJ for CMOS silicided S/D wafers (F#5, 6, 9, 10) -
145mJ for CMOS
implanted S/D wafers (F#3, 7) Hard bake: Oven bake at
120C for 1hr Device Si
thickness could be measured on the open areas of the wafers, ensuring the
removal of the photoresist from the PMOS windows. |
04/23/04 |
Horvath |