Step 13.0 P+ S/D implant
|
Steps |
Notes |
Date |
Operator |
|
13.1 |
CMOS implanted S/D wafers
only: F#1, 3, 7, 8. + 1 blank oxided test
wafer BF2, 2E15, 20 KeV, 7 deg.
tilt Wafers were sent to Core Systems
on 12/11/03. Wafers are back on
12/15/03. |
12/11/03 |
Horvath |