MEMORANDA FROM THE UC BERKELEY MICROLAB
 
1. Berkeley CMOS Process Test Patterns, No. UCB/ERL M84/26 
   W. G. Oldham, A. R. Neureuther
   March/June 1984
               From EECS 290N,O
               Volume 1: Analog Test Pattern
                                 Yield Test Pattern
                                 Shortloop Test Pattern
               Volume 2: Process Test Pattern (E)
                                 Process Drop-In Test Pattern (A)
                                 Device Drop-In Test Pattern (B)
                                 Device Test Pattern (F)
 
2. Berkeley CMOS Process, A User Guide, No. UCB/ERL M84/84
   W. G. Oldham, A. R. Neureuther, Y. Sacham, and F. Dupois
   October 1984
 
3. Characterization of the Boron+ Planar Dopant Source -
   Moisture Enhanced Process, No. UCB/ERL M86/75
   R. Alley, P. K. Ko, and K. Voros
   September 1986
 
4. MOS Processes in the Microfabrication Laboratory,
   No. UCB/ERL M87/12
   Katalin Voros and Ping K. Ko
   March 1987
 
5. An Object-Oriented Database Design for Integrated Circuit Fabrication. 
   No. UCB/ERL M87/43 
   Lawrence A. Rowe and Christopher B. Williams. 
   20 May 1987
 
6. Shop Floor Scheduling of Semiconductor Wafer Manufacturing,
   Mauricio Resende, PhD Thesis, 1987
 
7. MOSTCAP - An MOS Transistor Characterization and Analysis Program, 
   Gary S. May, MS Report, December 1987.
 
8. Berkeley Fabrication Facility Monitoring System, 
   Amit Sharma, MS Report, April 1988
 
9. EECS 143 Processing and Design of Integrated Circuits
   Laboratory Project, No. UCB/ERL M88/50
   Ping K. Ko, Robin R. Rudell, Katalin Voros
   August 1988
 
10. Tuning a Statistical Process Simulator to a Berkeley
    CMOS Process, No. UCB/ERL M88/82
    Paul M. Krueger
    December 1988
 
11. FLIP: A Graphic User Interface For Management and Utilization
    of Facilities, No. UCB/ERL M89/39
    Alex C. West
    April 1989
 
12. Evolution of the Microfabrication Facility at Berkeley,
    No. UCB/ERL M89/109  
    Katalin Voros, Ping K. Ko
    September 1989
 
13. A Tool For Collection of I-V Statistics Using HP 4062
    Semiconductor Parametric Test System, No. UCB/ERL M90/7
    Chia-Ray Ni
    January 1990
 
14. Process-Flow Specification and Dynamic Run Modification for Semi-
    conductor Manufacturing, No. UCB/ERL M91/40,
    Christopher J. Hegarty
    April 1991
 
15. FAULTS: An Equipment Maintenance And Repair Tracking System 
    Using a Relational Database, No. UCB/ERL M91/44
    David. C. Mudie
    May 1991
 
16. Electrical Testing of a CMOS Baseline Process, No. UCB/ERL M94/63
    David Rodriguez
    August 1994 
 
17. BCIMS: The Berkeley Computer Integrated manufacturing System,
    No. UCB/ERL M95/46
    L. J. Massa-Lochridge
    June 1995
 
18. CMOS Baseline Process In The UC Berkeley Microfabrication
    Laboratory, No. UCB/ERL M95/98
    Shenqing Fang
    December 1995
 
19. Etching For Micromachining Processing, No. UCB/ERL M96/37
    Kirt R. Williams, Richard S. Muller
    June 1996
 
20. CMOS Baseline Process In The UC Berkeley Microfabrication 
    Laboratory Report II, No. UCB/ERL M0061
    Laszlo Voros
    December 2000
 
21. Six-Inch CMOS Baseline Process In The UC Berkeley 
    Microfabrication Laboratory, No. UCB/ERL M02/39
    L. Voros and S. Parsa
    December 2002   
 
22. RUMS, Resource Utilization System, Memorandum No. UCB/ERL 03/43
    T. Duncan, T.K. Chen, D. Pestal and T. Merport
    November 2003
 
23. 0.35 um CMOS Process on Six-Inch Wafers, Baseline Report IV
    No. UCB/ERL M05/15
    A. Horvath, S. Parsa, H.Y. Wong
    April 2005