Microlab cmos60 Process Log
Begun on Mon Mar 20 15:55:14 PST 2000 by vorosl@argon.EECS.Berkeley.EDU

Mask set: CMOS58
Requested by: baseline CMOS
1.0um,twin-well, double metal cmos process.



Process Log: cmos60
Modified: Mon Mar 20 15:55:39 PST 2000
---------------------------------------------------

Operator: vorosl,pfang

Date: 03/20/00

Step Number: 0.0

Step Title: Starting Wafers: 24-36 ohm-cm, p-type, <100>.
__________________________________________________

Procedure: Sonogage is not calibrated well.
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
wafers #10,#11 keep for check later

=============================================================================

Process Log: cmos60
Modified: Thu Mar 23 17:07:40 PST 2000
---------------------------------------------------

Operator: vorosl

Date: 03/23/00

Step Number: 1.0

Step Title: Initial oxdidation: target=30(+/-5%) nm
__________________________________________________

Procedure: 1. TCA clean furnace tube (tylan5).
2. Standard clean wafers in sink6:
piranha 10 minutes, 10:1 HF dip, spin-dry.
3. Dry oxidation at 950 C
Recipe's name: SGATOX
60 minutes dry O2
20 minutes dry N2
check the Tox on PCH:

wafer center top left flat right S.D.
PCH 341 334 337 343 343 340/4


=============================================================================



Process Log: cmos60
Modified: Thu Mar 23 17:21:20 PST 2000
---------------------------------------------------

Operator: vorosl

Date: 03/23/00

Step Number: 2.0

Step Title: Nitride Deposition target=1000 A (100 nm), inculde NCH
__________________________________________________

Procedure: Transfer wafers to tylan9 right after the initial
oxidation and deposit 100 nm Silicon Nitride.
Recipe's name: SNITC
Deposit time: 23 minutes
Check the thickness of nitride on NCH:

wafer center top left flat right S.D.
NCH 1107 1111 1120 1119 1123 1116/7
#5 1035 1034 1042 1040 1046 1039/5

=============================================================================

Process Log: cmos60
Modified: Mon Apr 3 09:16:59 PDT 2000
---------------------------------------------------

Operator: vorosl

Date: 04/03/00

Step Number: 3.0

Step Title: Well Photo: Mask NWELL (CWN chrome-df)
__________________________________________________

Procedure: The GCAWS was down for two weeks
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

=============================================================================

Process Log: cmos60
Modified: Mon Apr 10 16:22:33 PDT 2000
---------------------------------------------------

Operator: vorosl, pfang

Date: 04/07/00

Step Number: 3.0

Step Title: N-Well Photo: Mask NWELL (chrome-df)
__________________________________________________

Procedure: Standard I-line process.
( 1st level exposure)
focus value: 250
exposure time: #1,#2,#4,#5 1.4sec (integrator mode)
all the other 1.8sec (exposure mode)
Note: hand developing not acceptable!

=============================================================================

Process Log: cmos60
Modified: Wed Apr 12 12:30:19 PDT 2000
---------------------------------------------------

Operator: vorosl

Date: 04/11/00

Step Number: 4.0

Step Title: Plasma etch nitride in Lam1
__________________________________________________

Procedure: Plasma etch nitride in Lam1. Low power recipe.
Recipe: NITSTD1 Power=150 W
Check actual etch rate: It was 772 A/min
Etchtime=1'25" Overetch=15%
Measure remaining oxide thickness in N-well areas
with Nanospec on each work wafer:
wafer #1 #2 #3 #4 #5 #6 #7 #8 #9 #13*
center 275 302 276 >100 301 276 277 302 231 251
top 296 320 296 >100 323 261 327 273 239 261

Note: #4 work wafer was not uniform, +1 min etch time.
=============================================================================

Process Log: cmos60
Modified: Thu Apr 13 16:26:39 PDT 2000
---------------------------------------------------

Operator: pfang

Date: 04/12/00

Step Number: 5.0

Step Title: N-well Implantation, Include PCH
__________________________________________________

Procedure: Phosphorus, 4E12/cm2, 80 KeV.

=============================================================================

Process Log: cmos60
Modified: Tue Apr 18 16:15:11 PDT 2000
---------------------------------------------------

Operator: pfang, vorosl

Date: 04/17/00

Step Number: 6.0

Step Title: N-well Cover Oxidation
__________________________________________________

Procedure: 1. TCA clean furnace tube (tylan2).
2. Remove PR in O2 plasma (Matrix) and clean wafers in sink8.
3. Standard clean wafers in sink6, include NCH and PCH.
4. Well cover oxidation at 950 C: (NWELLCVR recipe)
30 min, dry O2
175 min. wet O2
30 min, dry O2
20 min. N2
5. Measure the oxide thickness (Nanospec):

wafer PCH #1 #3 #5 #7 #9
center 5290 5308 5324 5345 5336 5334
top 5302 5317 5332 5352 5354 5329
left 5298 5322 5346 5378 5368 5352
flat 5283 5314 5340 5366 5358 5340
right 5291 5301 5314 5347 5338 5321
------------------------------------------------------------
Mean Value 5312 5331 5358 5351 5335
S.D. 8 13 14 14 12


=============================================================================

Process Log: cmos60
Modified: Wed Apr 19 10:51:43 PDT 2000
---------------------------------------------------

Operator: vorosl, pfang

Date: 04/19/00

Step Number: 7.0

Step Title: Nitride Removal
__________________________________________________

Procedure: 1. Dip in 10:1 HF for 40 sec. to remove thin oxide on
top of Si3N4.
2. Etch nitride off in boiling phosphoric acid (sink7).
Etch time= 28 min.
Measure Tox on NCH and work wafers:
wafer center top left flat right
NCH 307 307 310 304 302

wafer #1 #3 #5 #7 #9
top 348 346 336 331 324
center 329 337 337 332 332


=============================================================================

Process Log: cmos60
Modified: Fri Apr 21 14:43:50 PDT 2000
---------------------------------------------------

Operator: pfang


Date: 04/20/00

Step Number: 8.0

Step Title: P-well Implant
__________________________________________________

Procedure: B11, 3E12/cm2, 80 KeV, include NCH.
Note: Accidentally PCH was implanted again.
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

=============================================================================


Process Log: cmos60
Modified: Mon May 1 09:26:59 PDT 2000
---------------------------------------------------

Operator: vorosl

Date: 04/28/00

Step Number: 9.0

Step Title: Well Drive-In
__________________________________________________

Procedure: 1. TCA clean furnace tube (tylan2).
2. Standard clean wafers in sink8 and sink6, include controls
3. Well drive at 1120 C (WELLDR):
1 hr. temp ramp from 750 C to 1120 C
4 hrs. dry O2
5 hrs. N2
Measure oxide thickness on two control wafers

=============================================================================

Process Log: cmos60
Modified: Mon May 1 09:29:13 PDT 2000
---------------------------------------------------

Operator: pfang

Date: 05/02/00

Step Number: 10.0

Step Title: Pad Oxidation/Nitride Deposition
target= 30(+6) nm SiO2 + 100 (+10) nm Si3N4
__________________________________________________

Procedure: 1. TCA clean furnace tube (tylan5). Reserve tylan9.
2. Standard clean wafers (sink8, sink6). Include NCH,PCH.
3. Dry oxidation at 950 C. Recipe: SGATEOX
1 hour dry O2
30 minutes dry N2 anneal
4. Measure the oxide thickness on NCH
wafer
NCH

5. Deposit 100 (+10) nm of Si3N4 immediately, include PCH.
Recipe: SNITC
temperature: 800 C
approx. time=
Measure nitride thickness on PCH.
wafer
PCH
=============================================================================

Process Log: cmos60
Modified: Mon May 8 16:33:41 PDT 2000
---------------------------------------------------

Operator: vorosl, pfang

Date: 05/03/00

Step Number: 11.0

Step Title: Active Area Photo: Mask ACTV (ACTV emousion-cf)
__________________________________________________

Procedure: Standard I-line process.
(HMDS, coat, soft bake, expose,PEB, develope, inspect,
descum and hard bake)
Aperture settings:
X= 42.5 Y=42.5
#5,#6 & #8 integrator mode, exp.time=1.2 sec.
exposure mode, exposure time=1.8 sec.
focus value= 250, BSLN


=============================================================================

Process Log: cmos60
Modified: Mon May 8 16:42:32 PDT 2000
---------------------------------------------------

Operator: vorosl & pfang

Date: 05/04/00

Step Number: 12.0

Step Title: Nitride Etch
__________________________________________________

Procedure: 1. Plasma etch nitride in lam1.
Recipe: SNIT.RPC
Power: 150 W Time: 1' 25" Overetch: 15%
Actual etch rate= 750 A/min
Set: Time & Endpoint ( It worked)
Measure Tox on eatch work wafer. (2 point measurements)
wafer #1 #2 #3 #4 #5 #6 #7 #8 #9 #13
center251 269 277 255 275 297 290 277 277 253
flat 238 275 284 256 272 300 291 279 281 262


2. Do not remove PR. Inspect.
Measure PR thickness covering active area.
tpr= 780 nm
Hard bake again for>2 hrs at 120 C.)


=============================================================================

Process Log: cmos60
Modified: Mon May 8 16:52:06 PDT 2000
---------------------------------------------------

Operator: pfang

Date: 05/05/00

Step Number: 13.0

Step Title: P-Well Field Implant Photo: Mask PFIELD (CWNI emulsion-cf)
reverse NWELL mask
__________________________________________________

Procedure: Standard I-line process. (Second photo)
N-Well area is covered with PR.

=============================================================================

Process Log: cmos60
Modified: Fri May 12 16:03:49 PDT 2000
---------------------------------------------------

Operator: pfang

Date: 05/05/00

Step Number: 14.0

Step Title: P-Well Field Ion Implant
__________________________________________________

Procedure: Standard I-line process.

=============================================================================

Process Log: cmos60
Modified: Mon May 15 09:28:44 PDT 2000
---------------------------------------------------

Operator: vorosl

Date: 05/15/00

Step Number: 15.0

Step Title: N-Well Field Implant Photo: Mask NWELL (CWN chrome-df)
__________________________________________________

Procedure: 1. Remove PR in plasma O2 (Matrix).
2. Clean wafers in sink8.
3. Standard I-line process.
Exposure mode: time
Exposure time: 1.8 sec.
Focus value: 250

=============================================================================

Process Log: cmos60
Modified: Tue May 16 11:35:07 PDT 2000
---------------------------------------------------

Operator: vorosl

Date: 05/15/00

Step Number: 16.0

Step Title: N-Well Field Ion Implant
__________________________________________________

Procedure: phosphorus, 40 Kev, 3E12

=============================================================================

Process Log: cmos60
Modified: Tue May 23 10:05:57 PDT 2000
---------------------------------------------------

Operator: vorosl

Date: 05/19/00

Step Number: 17.0

Step Title: Locos Oxidation: target= 6500 A
__________________________________________________

Procedure: 1. TCA clean tylan2.
2. Remove PR in O2 plasma (Matrix) and piranha clean wafers.
Standard clean wafers; dip in BHF 25:1 for 5-10 sec.
Include NCH and PCH.
3. Wet oxidation at 950 C (SWETOXB):
5 min. dry O2
4 hours 40 min. wet O2
5 min. dry O2
20 min. N2 anneal
Measure Tox on 3 work wafers. Tox=
wafer center top left flat right
PCH 6750 6746 6827 6842 6769
NCH 6798 6748 6784 6792 6768
#1 7059 7032
#13 6899 6811

=============================================================================

Process Log: cmos60
Modified: Tue May 23 15:06:10 PDT 2000
---------------------------------------------------

Operator: vorosl

Date: 05/19/00

Step Number: 18.0

Step Title: Nirtide Removal
__________________________________________________

Procedure: 1. Dip in 5:1 BHF for 30 sec. to remove thin onide on top of Si3N4.
2. Etch nitride off in phosporic acid at 170 C (sink7).
Etch rate was found 14 A/ min. Time= 1 hour 30 min.

=============================================================================

Process Log: cmos60
Modified: Thu May 25 08:25:57 PDT 2000
---------------------------------------------------

Operator: vorosl

Date: 05/22/00

Step Number: 19.0

Step Title: Sacrificial Oxide: target= 200 (+/- 20) A
__________________________________________________

Procedure: 1. TCA clean furnace tube (tylan5).
2. Standard clean wafers, include PCH and NCH.
Dip in 10:1 HF until NCH and PCH dewet.
Dip in 10:1 HF work wafers to remove the pad oxide.
Dip time= 1' 00"
3. Dry oxidation at 950 C (SGATEOX):
30 min. dry O2
30 min. N2 anneal
Measure Tox on NCH and PCH:
wafer center top left flat right
PCH 207 202 209 202 204
NCH 205 200 203 200 201

=============================================================================

Process Log: cmos60
Modified: Thu May 25 08:46:34 PDT 2000
---------------------------------------------------

Operator: vorosl

Date: 05/22/00

Step Number: 20.0

Step Title: N-Channel Punchthrough and Threshold Adjustment Photo:
Mask PFIELD (CWNI emulsion-cf)
__________________________________________________

Procedure: Standard I-line process.
Aperture settings: 42.5 in X and Y
Exposure mode: time
Exposure time=1.8 sec
Focus Value= 250

=============================================================================

Process Log: cmos60
Modified: Thu May 25 09:01:14 PDT 2000
---------------------------------------------------

Operator: vorosl

Date: 05/23/00

Step Number: 21.0

Step Title: N-Channel Punchthrough and Treshold Adjustment Implant
Include NCH.
__________________________________________________

Procedure: 1. B11, 120 KeV, 8E11/cm2.
2. B11, 30 KeV, 1.9E12/cm2.

=============================================================================

Process Log: cmos60
Modified: Fri Jun 9 16:02:24 PDT 2000
---------------------------------------------------

Operator: vorosl

Date: 06/09/00

Step Number: 24.0

Step Title: Gate Oxidation/Poly-Si deposition:
target= 20 (+/-2.0)nm SiO2 and 450 (+/-40)nm poly-Si
__________________________________________________

Procedure: 1. TCA clean furnace tube (tylan5), reserve tylan11.

2. Remove PR in O2 plasma. Standard clean wafers, including
PCH, NCH, Tox and one Tpoly1 monitoring wafers.

3. Dip off sacrifitial oxide in 10:1 HF
until PCH and NCH dewet. approx. time=1'00".

4. Dry oxidation at 950 C (SGATEOX).
30 min. dry O2
30 min. dry N2 anneal
in tylan5.

5. Immediately deposit 4500 A of phos. doped poly-Si
after oxidation (11SDPLYJ).
temp= 610 C, deposition time= 2 hours and 50 min.

6. a) Measure Tox on monitoring wafer:
wafers center top left flat right
Tox 215 211 253 223 235
PCH 193 193 205 216 198

b) Measure Dit and Qox on Tox:
center Nsc Qox Dit IQF
center 3.15e14 7.66e10 1.25e10 0.97
left 2.75e14 6.4e10 2.14e10 0.97
flat 3.09e14 6.62e10 2.01e10 0.97
right 2.96e14 6.71e10 1.33e10 0.97
top 3.2e14 6.6e10 1.25e10 0.97

c) Measure Tpoly:
center top left flat right
3587 3538 3535 3660 3661

=============================================================================

Process Log: cmos60
Modified: Tue Jun 13 11:07:25 PDT 2000
---------------------------------------------------

Operator: vorosl

Date: 06/13/00

Step Number: 25.0

Step Title: Gate definition: Mask POLY (emulsion-cf)
__________________________________________________

Procedure: GCAWS was down for four days. (Theta joystick, lamp changing)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

=============================================================================

Process Log: cmos60
Modified: Tue Jun 13 16:49:36 PDT 2000
---------------------------------------------------

Operator: vorosl

Date: 06/16/00

Step Number: 25.0

Step Title: Gate definition: mask POLY (emulsion-cf)
__________________________________________________

Procedure: Standard I-line process.
Requested baseline correction.
Exposure mode: time
Executed EXPO BSLN (row mode): f/e= 250/2.3
Apertura settings= 42.5 in X & Y

=============================================================================

Process Log: cmos60
Modified: Thu Jun 22 16:51:13 PDT 2000
---------------------------------------------------

Operator: vorosl

Date: 06/19/00

Step Number: 26.0

Step Title: Plasma etch poly-Si
__________________________________________________

Procedure: 1. Etch poly-Si in Lam5.
recipe= 5003, top/bottom RF=300/150 W
current etch rate= 4 700 A/min
etch time= 46", overetch= 20% (no endpoint) for wafer#1,3,4,6
endpoint #2,5,7,8,9,13*
Note: Do not etch Tpoly wafer, because it needs for Rs.

2. Measure Tox on S/D area:
(Nanospec or Nanoduv 40X or 50X lens)
wafer#2: top:234 down:219 middle:343
wafer#5: top:212 down:235 middle:430
wafer#7: top:264 down:244 middle 341

3. Measure channnel lenght using 1.0 um gate:
(Vickers)
wafer# 2 5 9
Center(1) 0.99 0.96 1.11
Center(2) 1.01 1,24 1.00
Top(1) 1.19 1.11
Top(2) 1.21 1.08

Note: Wafer# 2,5,7 were reworked from gate ox./poly deposition.

==========================================================================
Process Log: cmos60
Modified: Fri Jul 14 10:12:41 PDT 2000
---------------------------------------------------

Operator: vorosl

Date: 6/23/00

Step Number: 30.0

Step Title: N+S/D Photo: Mask N+S/D (NSD chrome-df)
__________________________________________________

Procedure: Standard I-line process.
Focus value/exposure time=250/2.1 in time mode.

=============================================================================

Process Log: cmos60
Modified: Fri Jul 14 11:55:33 PDT 2000
---------------------------------------------------

Operator: vorosl

Date: 6/23/00

Step Number: 31.0

Step Title: N+S/D Implant
__________________________________________________

Procedure: Arsenic, 100 KeV, 5e15/cm2, include NCH

=============================================================================

Process Log: cmos60
Modified: Fri Jul 14 11:58:13 PDT 2000
---------------------------------------------------

Operator: ernes, vorosl

Date: 7/10/00

Step Number: 32.0

Step Title: N+S/D anneal
__________________________________________________

Procedure: 1. TCA clean furnace tube (tylan7)
2. Remove PR in O2 plasma in Matrix.
3. Standard clean wafers in sink8 and sink6, include NCH & PCH
4. Anneal in N2 at 900 C for 30 min.(N2ANNAEL)
5. Measurement:
Rs(NCH)=
center top left flat right
34 37.5 42.5 31.1 34.8 [ohm/sq]
Rs(Tpoly1)=
19.2 19.3 19.2 19.1 19 [ohm/sq]


=============================================================================

Process Log: cmos60
Modified: Fri Jul 14 17:44:00 PDT 2000
---------------------------------------------------

Operator: ernes

Date: 7/11/00

Step Number: 33.0

Step Title: P+S/D Photo
__________________________________________________

Procedure: Standard I-line process.

=============================================================================

Process Log: cmos60
Modified: Fri Jul 14 17:53:59 PDT 2000
---------------------------------------------------

Operator: vorosl

Date: 7/11/00

Step Number: 34.0

Step Title: P+S/D Implant
__________________________________________________

Procedure: B11, 20 KeV, 5e15/cm2, include PCH.

=============================================================================

Process Log: cmos60
Modified: Fri Jul 21 09:10:55 PDT 2000
---------------------------------------------------

Operator: vorosl, ernes

Date: 07/17/00

Step Number: 35.0

Step Title: PSG Deposition and Densification
__________________________________________________

Procedure: 1. Remove PR in O2 plasma in Matrix.
2. Standard clean wafers in sink8 (no dip).
3. Standard clean wafers in sink6 (10 sec. dip in 10/1 HF).
Include PSG control wafers and PCH.
4. Deposit 7000 A PSG wafersi
Recipe: VDOLTOC
PH3 flow: 11.6 sccm
Deposition time: 45 min.
Temperature: 450 C
5. Densify glass in tylan2 at 900 C immediately after PSG
deposition. Include PSG control wafers.
Recipe: PSGDENS
5 min dry O2
20 min wet O2
5 min dry O2
6. Measure PSG thickness on control wafers:
Center Top Left Flat Right
7802 7968 7700 7868 7929
7. Measure sheet resistance on PCH with 4ptprb:
Strip off oxide on PCH in sink8.
Wafer Center Top Left Flat Right
PCH 125 124 120 125 128
(PCH control was implanted by N-well and P-well
dose accidantly!)
=============================================================================

Process Log: cmos60
Modified: Fri Jul 21 09:47:29 PDT 2000
---------------------------------------------------

Operator: vorosl, ernes

Date: 07/20/00

Step Number: 36.0

Step Title: Contact Photo: Mask CONT
__________________________________________________

Procedure: GCAWS was down for lamp changing.
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Standard I-line process.
Focus/exposure values: 250/2 sec in time mode.

=============================================================================

Process Log: cmos60
Modified: Mon Jul 31 15:13:58 PDT 2000
---------------------------------------------------

Operator: vorosl, ernes

Date: 07/20/00

Step Number: 37.0

Step Title: Contact Plasma Etch in Lam2
__________________________________________________

Procedure: 1. Etch contact hole in Lam2.
recipe: SiO2etch
power: 850 W, overetch: 750 W
etch time= 1' 23", overetch=30"
2. Dip in 5:1 BHF for 10 sec.



=============================================================================

Process Log: cmos60
Modified: Mon Jul 31 15:34:10 PDT 2000
---------------------------------------------------

Operator: vorosl

Date: 07/21/00

Step Number: 38.0

Step Title: Backside etch
__________________________________________________

Procedure: 1. Remove PR in O2 plasma (matrix), piranha clean wafers in
sink8 (no dip.) Dehydrate wafers in oven at 120 C >30 min.
2. Spin PR on front side, hard bake.
3. Dip off oxide (PSG) in 5:1 BHF. approx. 2'20"
include PCH and NCH.
4. Etch poly-Si (poly1 thickness) in lam5.
5. Final dip in BHF until back dewets.
6. Remove PR in matrix, piranha clean wafers in sink8
(no dip).

=============================================================================

Process Log: cmos60
Modified: Mon Jul 31 16:16:04 PDT 2000
---------------------------------------------------

Operator: vorosl, ernes

Date: 07/24/00

Step Number: 39.0

Step Title: Metallization: target= 6000 A
__________________________________________________

Procedure: 1. Clean wafers in sink6 and do 30 sec. 25:1 HF dip just
before metallization.
2. Sputter Al/2%Si on all wafers in CPA.
Power=4.5 KW, speed=25 cm/min two passes.

=============================================================================

Process Log: cmos60
Modified: Mon Jul 31 16:25:56 PDT 2000
---------------------------------------------------

Operator: ernes

Date: 07/25/00

Step Number: 40.0

Step Title: Metal Photo: Mask METAL1-CM (emulsion-cf)
__________________________________________________

Procedure: Standard I-line process.
Focus/ exposure= 250/2
Aperture settings= 42.5 (in X,Y)

=============================================================================

Process Log: cmos60
Modified: Mon Jul 31 16:29:22 PDT 2000
---------------------------------------------------

Operator: vorosl, ernes

Date: 07/26/00

Step Number: 41.0

Step Title: Plasma etch Al in Lam3
__________________________________________________

Procedure: Etch Aluminum in Lam3 with standard recipe.
etch time= 1'16" overetch= 50%
power= 250 W
Remove PR in matrix. tAl=

=============================================================================

Process Log: cmos60
Modified: Mon Jul 31 16:41:45 PDT 2000
---------------------------------------------------

Operator: vorosl

Date: 07/26/00

Step Number: 42.0

Step Title: Sintering: 400 C for 20 min. in forming gas (tylan13)
__________________________________________________

Procedure: Clean wafers, rinse in DI water.
No ramping, use SINT400 recipe.

=============================================================================

Process Log: cmos60
Modified: Mon Jul 31 16:45:20 PDT 2000
---------------------------------------------------

Operator: vorosl, ernes

Date: 07/27/00

Step Number: 43.0

Step Title: Testing
__________________________________________________

Procedure: N-type transistors work well, P-type transistors have
threshold voltage shifting. Data are on CMOS Baseline's web page.
http://www-microlab.eecs.berkeley.edu:8080/baseline/index.html

P-type transistors show a large leakage current.


=============================================================================

Wafer #1 was sent out to SPA (carrier concentration profile)

= =================================================================


Process Log: cmos60
Modified: Thu May 10 09:22:20 PDT 2001
---------------------------------------------------

Operator: vorosl

Date:

Step Number: 44.0

Step Title: Planerization and Dielecrtic Film Deposistion
__________________________________________________

Procedure: 1. Rinse and dry wafers in spindryer2&1.

LTO deposion in tystar14.