Microlab
cmos59 Process Log
Begun on Tue Jan 19 13:37:46 PST 1999 by
gwang@palladium.eecs.berkeley.edu
Continued (from step: 24.0) on Tue Jan 11 16:25:01 PST 2000
by vorosl@argon.eecs.berkeley.edu
Mask set: CMOS58
Requested by: baseline CMOS
1.0um,twin-well, double metal cmos process.
Process Log: cmos59
Modified: Tue Jan 19 14:56:46 PST 1999
---------------------------------------------------
Operator: kjlewis
Date: 1-19-99
Step Number: 0.0
Step Title: Starting Wafers: 24-36 ohm-cm, p-type,
<100>.
__________________________________________________
Procedure: Control wafers: NCH, PCH
wafers.
Scribe lot and wafer number
on each wafer, including controls.
Piranha clean and dip in
sink8.
Measure bulk
resistivity(ohms-cm) of control wafer on Sonogage:
wafer center
top left flat
right
#1 28.9
26.7 32.9 32.5
27.2
#2 28.2
28.0 31.5 31.2
27.9
#3 34.1
33.4 35.6 35.6
33.4
#4 30.9
31.2 32.0 32.8
30.8
#5 26.6
26.5 27.5 27.5
26.6
#6 29.5
30.1 30.7 30.4
26.7
#7 31.8
31.6 32.0 31.8
32.3
#8 29.3
29.6 29.6 29.8
29.2
#9 33.6
34.0 34.2 34.4
33.1
#10 29.5
28.9 29.8 29.4
29.6
NCH 34.3
35.2 33.7 35.3
35.0
PCH 34.1
34.8 34.9 35.4
34.6
=============================================================================
Process Log: cmos59
Modified: Fri Jan 22 13:05:32 PST 1999
---------------------------------------------------
Operator: gwang
Date: 1-19-99
Step Number: 1.0
Step Title: Initial Oxidation: target = 30 (+/- 5%) nm
__________________________________________________
Procedure: 1. TCA clean furnace tube
(tylan5).
2. Standard clean wafers in
sink6:
piranha 10 minutes, 10/1
HF dip, spin-dry.
3. Dry oxidation at 950 C
(SGATEOX):
60 min. dry O2
20 min. dry N2
check the Tox on PCH:
wafer center
top left flat
right S.D.
PCH 308
310 311 313
309 310/2
=============================================================================
Process Log: cmos59
Modified: Fri Jan 22 13:10:03 PST 1999
---------------------------------------------------
Operator: gwang
Date: 1-19-99
Step Number: 2.0
Step Title: Nitride Deposition target=1000 A, include NCH
__________________________________________________
Procedure: Transfer wafers to tylan9
right after 1.3 and deposit 100nm Nit.
Deposit time = 23 min.
Check the thickness of
nitride on NCH:
wafer center
top left flat
right S.D.
NCH 938
938 943 942
951 942/5
=============================================================================
Process Log: cmos59
Modified: Fri Jan 22 13:13:07 PST 1999
---------------------------------------------------
Operator: gwang
Date: 1-20-99
Step Number: 3.0
Step Title: Well Photo: Mask NWELL
(chrome-df)
__________________________________________________
Procedure: Standard I-line process.
=============================================================================
Process Log: cmos59
Modified: Fri Jan 22 15:26:22 PST 1999
---------------------------------------------------
Operator: kjlewis
Date: 1-22-98
Step Number: 4.0
Step Title: Plasma etch nitride in lam1
__________________________________________________
Procedure: Plasma etch nitride in lam1.
Recipe: NITSTD1 Power= 150 W
Etchtime= 1'10"
(wafer #2)
Etchtime= 1'05" (all
other wafers)
Overetch= 15%
Measure the oxide
thickness on each work wafer:
wafer #1
#2 #3 #4
#5 #6 #7
#8 #9 #10
center 233
158 224 221
250 225 206
210 213 200
top 238
197 239 247
262 243 215
233 227 206
left 240
190 252 235
267 249 230
234 231 224
flat 239
177 243 226
270 244 222
228 232 230
right 245
192 262 243
274 246 237 224 223
215
mean 239
183 244 234
265 241 222
226 225 215
std 4
16 14 11
9 9 12
10 8 12
=============================================================================
Process Log: cmos59
Modified: Fri Jan 22 15:43:10 PST 1999
---------------------------------------------------
Operator: kjlewis
Date: 1-22-99
Step Number: 5.0
Step Title: N-well Implantation, Include PCH.
__________________________________________________
Procedure: Phosphorus, 4E12/cm2, 80 KeV.
=============================================================================
Process Log: cmos59
Modified: Mon Feb
8 13:22:00 PST 1999
---------------------------------------------------
Operator: gwang
Date: 2-1-99
Step Number: 6.0
Step Title: N-Well Cover Oxidation
__________________________________________________
Procedure: 1. TCA
clean furnace tube(tylan2).
2.
Remove PR in O2 plasma and clean wafers in sink8.
3. Standard clean waferss in sink6, include NCH
and PCH.
4. Well cover oxidation at 950(NWELLCVR).
30 min dry O2
175 min wet
O2
30 min dry O2
20 min N2
=============================================================================
Process Log: cmos59
Modified: Mon Feb
8 13:26:35 PST 1999
---------------------------------------------------
Operator: gwang
Date: 2-2-99
Step Number: 7.0
Step Title: Nitride Removal
__________________________________________________
Procedure: 1. Dip
in 10:1 HF for 40 sec to remove thin oxide on
top of Si3N4.
2. Etch nitride off in boiling phosphoric
acid(sink7).
3. Measure Tox:
Thick Oxide:
PCH 5178
5125 5160 5217
5172
Thin Oxide:
#1 262
268 260 269
278
=============================================================================
Process Log: cmos59
Modified: Mon Feb
8 13:32:17 PST 1999
---------------------------------------------------
Operator: kjlewis
Date: 2-2-99
Step Number: 8.0
Step Title: P-Well Implant
__________________________________________________
Procedure: B11, 3e12/cm2, 80 KeV. Iclude NCH.
=============================================================================
Process Log: cmos59
Modified: Mon Feb
8 13:34:43 PST 1999
---------------------------------------------------
Operator: gwang
Date: 2-5-99
Step Number: 9.0
Step Title: Well Drive-In
__________________________________________________
Procedure: 1. TCA
clean furnace tube(tylan2)
2. Standard clean wafers in sink 8 and 6.
Include NCH and
PCH.
3. Well Drive aat 1120 C(WELLDR)
60 min temp. ramp from 750 to 1120 C
240 min dry O2
300 min N2
4. Measure oxide thickness on two
controls.
PCH 6074
6029 6073 6108
6113 std:6079/34
NCH 3068
3063 3057 3055
3077 std:3064/9
5. Strip oxide in 5:1 BHF.
Measure Rs on PCH and
NCH.
Rs(PCH)= 1585 1591
1583 1590 1596
Rs(NCH)= 603 626
623 627 626
=============================================================================
Process Log: cmos59
Modified: Fri Feb 19 14:32:50 PST 1999
---------------------------------------------------
Operator: gwang
Date: 02/06/99
Step Number: 10.0
Step Title: Pad Oxidation/Nitride
Deposition:
target = 30 (+6) nm SiO2
+ 100 (+10) nm Si3N4
__________________________________________________
Procedure: tylan9 was down for 10 days!
^^^^^^^^^^^^^^^^^^^^^^^^^^^^
=============================================================================
Process Log: cmos59
Modified: Fri Feb 19 14:37:35 PST 1999
---------------------------------------------------
Operator: gwang
Date: 02/18/99
Step Number: 10.0
Step Title: Pad Oxidation/Nitride
Deposition:
target = 30 (+6) nm SiO2
+ 100 (+10) nm Si3N4
__________________________________________________
Procedure: 1. TCA clean furnace tube
(tylan5). Reserve tylan9.
2. Standard clean
wafers. Include PCH and NCH.
3. Dry oxidation at 950 C
(SGATEOX):
1 hr. dry O2
30 minutes dry N2
anneal.
Measure tox on
monitoring wafers. Tox=
wafer center
top left flat
right STD
NCH 311
315 316 318
315 315/3
4. Deposit 1000 (+100) A of
Si3N4 immediately (SNITC):
time = 25 min., temp.=
800 C.
Measure nitride thickness
on PCH.
wafer center
top left flat
right STD
1051 1057
1054 1052 1060
1055/4
=============================================================================
Process Log: cmos59
Modified: Fri Feb 19 14:40:09 PST 1999
---------------------------------------------------
Operator: gwang
Date: 02/19/99
Step Number: 11.0
Step Title: Active Area Photo: Mask ACTV (ACTV emulsion-cf)
__________________________________________________
Procedure: Standard I-line
process.
=============================================================================
Process Log: cmos59
Modified: Fri Feb 19 15:28:36 PST 1999
---------------------------------------------------
Operator: kjlewis
Date: 2/19/99
Step Number: 12.0
Step Title: Nitride Etch
__________________________________________________
Procedure: Plasma etch in lam1: pw=150;
overetch=15%
Etchtime= 1'15"
except wafer7 etchtime=1'10"
Measure tox on each work
wafer:
wafer #1
#2 #3 #4
#5 #6 #7
#8 #9 #10
center 280
267 244 195
218 236 285
257 220 234
top 281
270 258 193
238 257 284
259 205 236
left 282
278 261 203
236 245 296
277 225 251
flat 285
271 252 202
231 244 286
268 227 237
right 292
273 245 199
257 247 285
265 217 232
tpr= 845 nm
=============================================================================
Process Log: cmos59
Modified: Mon Feb 22 15:10:38 PST 1999
---------------------------------------------------
Operator: kjlewis
Date: 2/22/99
Step Number: 13.0
Step Title: P-Well Field Implant Photo: Mask PFIELD (emulsion-cf)
__________________________________________________
Procedure: Standard I-line process.
=============================================================================
Process Log: cmos59
Modified: Mon Mar
1 13:50:46 PST 1999
---------------------------------------------------
Operator: gwang
Date: 2-23-99
Step Number: 14.0
Step Title: P-Well Field Ion Implant
__________________________________________________
Procedure: B11, 70 KeV, 11.5E13/cm2
=============================================================================
Process Log: cmos59
Modified: Mon Mar
1 13:53:56 PST 1999
---------------------------------------------------
Operator: kjlewis
Date: 2-26-99
Step Number: 15.0
Step Title: N-Well Field Implant Photo: Mask NWELL (CWN chrome-df)
__________________________________________________
Procedure: 1.
Remove PR in O2 plasma. Clean
wafers in sink8.
2. Standard I-line process.
=============================================================================
Process Log: cmos59
Modified: Mon Mar
1 13:55:41 PST 1999
---------------------------------------------------
Operator: kjlewis
Date: 3-1-99
Step Number: 16.0
Step Title: N-Well Field Implant
__________________________________________________
Procedure: Phosphorus, 40KeV, 3E12/cm2
=============================================================================
Process Log: cmos59
Modified: Fri Mar
5 15:41:45 PST 1999
---------------------------------------------------
Operator: gwang & kjlewis
Date: 3-5-99
Step Number: 17.0
Step Title: LOCOS oxidation: target = 6500 A
__________________________________________________
Procedure: 1. TCA
clean tylan2
2. Remove PR in O2 plasma and piranha clean
wafers.
Standard clean wafer;
dip in BHF 25:1 for 5-10 sec
Include NCH and
PCH
3. Wet oxidation at 950 C (SWETOXB)
5 min. dry O2
4 hrs. 40 min. wet
O2
5 min. dry O2
20 min. N2
anneal
Measured tox on 3 work
wafers. Tox=
wafer center
top left flat
right
PCH 6950
6966 6918 6954
6932
#1
6981 6939 6982
6994 6974
#9 6955
6909 6932 6975
6917
mean/std = 6952/27
=============================================================================
=============================================================================
Process Log: cmos59
Modified: Wed Mar 10 13:46:37 PST 1999
---------------------------------------------------
Operator: gwang
Date: 03/08/99
Step Number: 18.0
Step Title: Nitride Removal
__________________________________________________
Procedure: 1. Dip in 5:1 BHF for 30
sec to remove thin oxide on top of Si3N.
2. Etch nitride off in
phosphoric acid at 145 C (sink7).
=============================================================================
Process Log: cmos59
Modified: Wed Mar 10 13:48:45 PST 1999
---------------------------------------------------
Operator: gwang
Date: 03/09/99
Step Number: 19.0
Step Title: Sacrificial Oxide: target =
200 (+/-20) A
__________________________________________________
Procedure: 1. TCA clean furnace tube
(tylan5).
2. Standard clean wafers,
include PCH and NCH.
Dip in 10:1 HF until NCH
and PCH dewet.
Dip time =
1'00"
3. Dry oxidation at 950 C
(SGATEOX):
30 min. dry O2
30 min. dry N2
anneal
Measure Tox on PCH and
NCH:
wafer center
top left flat
right
NCH 203
203 203 202
203
=============================================================================
Process Log: cmos59
Modified: Wed Mar 10 13:50:04 PST 1999
---------------------------------------------------
Operator: gwang
Date: 03/09/99
Step Number: 20.0
Step Title: N-Channel Punchthrough and
Threshold Adjustment Photo:
Mask PFIELD (CWNI
emulsion-cf)
__________________________________________________
Procedure: Standard I-line
process.
=============================================================================
Process Log: cmos59
Modified: Wed Mar 10 13:50:52 PST 1999
---------------------------------------------------
Operator: gwang
Date: 03/09/99
Step Number: 21.0
Step Title: N-Channel Punchthrough and
Threshold Adjustment Implant
Include NCH.
__________________________________________________
Procedure: 1. B11, 120KeV, 8E11/cm2.
2. B11, 30KeV, 1.9E12/cm2.
=============================================================================
Process Log: cmos59
Modified: Mon Mar 15 13:13:31 PST 1999
---------------------------------------------------
Operator: kjlewis
Date: 3/12/99
Step Number: 22.0
Step Title: P-Channel Punchthrough and Threshold
Adjustment Photo Mask
Mask: PVT chrome-df
__________________________________________________
Procedure: 1)
Remove PR in plasma O2 and clean wafers in sink8.
2) Standard I-line process.
=============================================================================
Process Log: cmos59
Modified: Mon Mar 15 13:36:46 PST 1999
---------------------------------------------------
Operator: kjlewis
Date: 3/15/99
Step Number: 23.0
Step Title: P-Channel Punchthrough and Threshold
Adjustment Implant
Include PCH.
__________________________________________________
Procedure: 1)
Phosphorus, 190 KeV, 1E12
2) B11, 20KeV, 2.4E12
=============================================================================
Process Log: cmos59
Modified: Tue Mar 23 15:57:30 PDT 1999
---------------------------------------------------
Operator: gwang
Date: 03/23/99
Step Number: 24.0
Step Title: Gate Oxidation/Poly-Si
Deposition:
target = 20(+/-2.0)nm SiO2
+ 450(+/-40)nm poly-Si
__________________________________________________
Procedure: Tylan11 was down !!!
^^^^^^^^^^^^^^^^^^^^
=============================================================================
continued by
vorosl@argon.EECS.Berkeley.EDU
=============================================================================
Laszlo
Voros
=============================================================================
Process Log: cmos59
Modified: Tue
Jan 11 16:25:01 PST 2000
---------------------------------------------------
Operator: vorosl
Date: 01/11/00
Step Number: 24.0
Step Title: Gate Oxidation/Poly-Si
Deposition:
target = 20(+/-2.0)nm SiO2
+ 450(+/-40)nm poly-Si
__________________________________________________
Procedure: 1. TCA clean furnace tube
(tylan5), reserve tylan11.
2. Standard clean wafers,
including PCH, NCH and,
Tox and one Tpoly1
monitoring wafers.
3. Dip off sacrificial
oxide in 10/1 HF
until PCH and NCH dewet
(time=1'00").
4. Dry oxidation at 950 C
(SGATEOX):
30 min. dry O2
30 min. dry N2
anneal.
5. Immediately deposit 4500
A of phos.doped poly-Si after
oxidation
(11SDPLYJ).
approx.time = 3 hrs 20
min., temp = 610 C
6. a) Measure Tox on
monitoring wafer:
wafers center
top left flat
right
NCH
Tox 165 157
167 164 165
b) Measure Dit and Qox
on Tox:
wafers Nsc
Qox Dit IQF
Tox
c) Measure Tpoly:
center top
left flat right
4030 4066
3946 4052 4048
=============================================================================
Process Log: cmos59
Modified:
Fri Jan 18 11:25:16 PST 2000
---------------------------------------------------
Operator: vorosl
Date: 01/19/00
Step Number: 25.0
Step Title: Gate Definition: Mask POLY
(CPG emulsion-cf)
__________________________________________________
Procedure: Standard I-line
process.
HMDS, spin (and soft bake), expose, post exposure bake,
develop, inspect, descum and hard bake.
Apertura settings: 42.5 (X,Y)!
Focus value: 240
Exposure time: 1.5 sec.
=============================================================================
Process Log: cmos59
Modified: Thu Jan 27 08:40:51 PST 2000
---------------------------------------------------
Operator: vorosl, pfang
Date: 1/21/00
Step Number: 26.0
Step Title: Plasma etch poly-Si
__________________________________________________
Procedure: 1. Etch poly in lam5.
etch time= 65",
overetch= 20% (endpoint)
2. Measure Tox on S/D area:
Wafer# 1 3 5 9
center 355 285 332 335
edge 349 278 341 319
3. Measure channel length using 1.0 um gate:
(by vickers)
top center flat left right
1.71 1.38 1.3 1.34 1.02
1.33 1.14 1.21 1.26 1.16
=============================================================================
Process Log: cmos59
Modified: Thu Jan 27 08:59:12 PST 2000
---------------------------------------------------
Operator: pfang, vorosl
Date: 1/27/00
Step Number: 27.0
Step Title: N+ S/D Photo: Mask N+ S/D (NSD chrome-df)
__________________________________________________
Procedure: Standard I-line
process.
HMDS, spin (and soft
bake)(program 1 and 1)
expose, post exposure bake,
develop, inspect, descum
and hard bake.
Focus value: 240
Exposure time: 1.5
sec.
===============================================================================
Process Log: cmos59
Modified: Mon Jan 31 16:32:46 PST 2000
---------------------------------------------------
Operator: pfang
Date: 1/31/00
Step Number: 31.0
Step Title: N+ S/D Implant
__________________________________________________
Procedure: Arsenic, 100 KeV, 5E15/cm2,
include NCH
Angle of incidence: zero
=============================================================================
Process Log: cmos59
Modified: Tue Feb
8 14:04:49 PST 2000
---------------------------------------------------
Operator: vorosl
Date: 2/8/00
Step Number: 32.0
Step Title: N+S/D anneal
__________________________________________________
Procedure: 1. TCA clean furnace tube
(tylan7)
2. Remove PR in O2 plasma at 300W for 7 min.
Strip off PR in spindryers3
3. Standard clean wafers in sink8 and sink6,
include NCH, PCH, Tpoly1 and
Tpoly2.
4. Anneal in N2 at 900C for
30 min. (N2ANNEAL)
5. Measurement:
Rs(NCH)=
center top left flat right
45 43 42 43 45
Rs(Tpoly1)=
172 178 177 168 176
===========================================================================
Process Log: cmos59
Modified: Fri Feb 11 12:07:51 PST 2000
---------------------------------------------------
Operator: pfang,
vorosl
Date: 2/11/00
Step Number: 33.0
Step Title: P+ S/D Photo (cf.)
__________________________________________________
Procedure: Standard I-line
process
Aperture settings X=42.5,
Y=42.5
Focus value: 240
Exposure time: 1.5 sec.
File: BSLN
============================================================================
Process Log: cmos59
Modified: Mon Feb 14 15:36:53 PST 2000
---------------------------------------------------
Operator: pfang
Date: 2/14/00
Step Number: 34.0
Step Title: P+S/D Implantation
__________________________________________________
Procedure: B11, 20KeV, 5E15/cm2,
include PCH
Angle of Incidence: zero
=========================================================================
Process Log: cmos59
Modified: Mon Feb 28 12:38:54 PST 2000
---------------------------------------------------
Operator: vorosl
Date: 02/24/00
Step Number: 35.0
Step Title: PSG deposition and Densification
__________________________________________________
Procedure: 1. Ash PR in Matrix at 500
W for 1.5 min.
2. Standard clean wafers in sink8 (no dip).
3. Standard clean wafers in sink6 (10 sec dip in 10:1 HF).
Include PSG control wafers.
4. Deposit 7000A PSG in tylan 12:
PH3 flow: 11.6
sccm
Recipe: VDOLTOD
Time: 50
min
Temp: 450
C
5. Densify glass in tylan2 at 900 C immediately after PSG
deposition. Include PSG control wafers
Recipe: PSGDENS
5 min dry O2
20 min wet O2
5 min dry O2
6. Measure PSG thickness on control wafer:
Center Top Left Flat Right
8222 8350 8136 8172 8178
PSG thickness on work wafers: inside N+S/D
area
(Nanospec, 40X lens) 8022; 8014; 8020
inside P+S/D area
7631;
7626; 7640
7. Measure sheet resistance on PCH:
(Strip off oxide on PCH in sink8)
Wafer Center Top Left Flat Right
PCH 142 146 149 140 144
=============================================================================
Process Log: cmos59
Modified: Tue Feb 29 15:16:32 PST 2000
---------------------------------------------------
Operator: vorosl
Date: 02/29/00
Step Number: 36.0
Step Title: Contact Photo: Mask CONT (chrome, df)
__________________________________________________
Procedure: Standard I-line
process.
(HMDS, coat, exposure, PEB,
develop, inspect,
descum, hard bake(30
min.))
focus value: 250
exposure time: 1.5 sec.
inspect: target, contact holes
position-> good
elbow-> exposure time good
File name: BSLN
=============================================================================
Process Log: cmos59
Modified: Fri Mar
3 14:59:20 PST 2000
---------------------------------------------------
Operator: vorosl
Date: 03/02/00
Step Number: 37.0
Step Title: Contact plasma etch in lam2
__________________________________________________
Procedure: 1. Etch contact hole in
lam2
recipe: SiO2etch
measure the actual etch rate on PSG
control wafer-> etch rate=5700 A
power: 850 W, etch time: 1` 20"
overetch: 20" (power=700 W)
2. Measure oxide after etch on S/D:
?
inspect the contact hole by Reichert
=============================================================================
Process Log: cmos59
Modified: Fri Mar
3 15:35:17 PST 2000
---------------------------------------------------
Operator: vorosl
Date: 03/03/00
Step Number: 38.0
Step Title: Back side etch
__________________________________________________
Procedure: 1. Ash PR in
Matrix(standard recipe)
2. Piranha clean wafers in sink8 (no dip)
3. Dehydrate wafers in oven at 120 C for > 30 min.
4. HMDS, Spin PR on front side, hard bake.
5. Dip off oxide (PSG) in 5:1 BHF time: 2`20".
6. Etch poly-Si (poly1 thickness) in lam5.
recipe: 5001, time: 70 sec.
7. Final dip in BHF until back dewets.
8. Ash PR in Matrix (standard recipe), piranha clean wafers
in sink8 (no dip).
=============================================================================
Process Log: cmos59
Modified: Mon Mar
6 16:59:11 PST 2000
---------------------------------------------------
Operator: zebra, vorosl
Date: 03/06/00
Step Number: 39.0
Step Title: Metallization: target= 6000 A
__________________________________________________
Procedure: 1. Clean the wafers and 30
sec. 25:1 HF dip
before metallization.
2. Sputter Al/2% Si on #3,#5 wafers in CPA.
speed= 20cm/min, 2 passes
=============================================================================
Process Log: cmos59
Modified: Tue Mar
7 14:43:25 PST 2000
---------------------------------------------------
Operator: vorosl
Date: 03/07/00
Step Number: 40.0
Step Title: Metal Photo: Mask METAL1-CM (emusion-cf)
__________________________________________________
Procedure: Standard I-line process.
HMDS, spin (and soft bake), expose, post exposure bake
develop, inspect, descum and hard bake.
Exposure time: 1.5 sec
Focus value: 250
Aperture settings: X,Y= 42.5
File: BSLN
Target position: X=0.6, Y=-3.25
#3 and #5 wafers
=============================================================================
Process Log: cmos59b
Modified: Wed Mar
8 14:33:45 PST 2000
---------------------------------------------------
Operator: vorosl, pfang
Date: 03/06/00
Step Number: 41.0
Step Number:
Step Title: Plasma etch Al in Lam3
__________________________________________________
Procedure: Lam3 was down for CRT
display monitor problem.
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
=============================================================================
Process Log: cmos59b
Modified: Fri Mar 10 09:18:27 PST 2000
---------------------------------------------------
Operator: vorosl, pfang
Date: 03/09/00
Step Number: 41.0
Step Title: Plasma etch Al in Lam3
__________________________________________________
Procedure: 1. power= 250 W, etch time=
1'12", overetch= 50%( 250W)
etch rate= 5000 A/min
#3 and #5 wafers
(PR burnt a little)
2. Remove PR in Matrix (time=1'30").
Measure the Al thickness on
As200.
tAl= 7800 A
=============================================================================
Process Log: cmos59b
Modified: Fri Mar 10 09:24:23 PST 2000
---------------------------------------------------
Operator: pfang, vorosl
Date: 03/10/00
Step Number: 42.0
Step Title: Sintering: 400 C for 20 min. in forming gas (tylan13)
__________________________________________________
Procedure: All cleaning is rinse in DI
water (spindryer1)
before tylan13. No piranha.
No ramping, use SINT400 program (BSAC floppy).
=============================================================================
Process Log: cmos59b
Modified: Mon Mar 20 15:45:36 PST 2000
---------------------------------------------------
Operator: vorosl
Date: 03/13/00
Step Number: 43.0
Step Title: Testing
__________________________________________________
Procedure: Both p- and n-type
transistors works perfect.
Data on the Baseline web
page.
=============================================================================
Wafer #1 was sent out to SRA (carrier concentration profile).
============================================================================